1. Technical Field
Example embodiments relate to a magnetic memory device and a method of writing date therein. More particularly, example embodiments relate to a spin transfer torque magnetic random access memory (STT-MRAM) device and a method of writing data therein.
2. Description of the Related Art
An STT-MRAM device includes memory cells. Each memory cell may have a free layer pattern, which together with other sequentially stacked layers, are configured to store bit data. In the STT-MRAM device, currents may be applied to change a magnetization direction of the free layer pattern so that the data may be written in a given memory cell. Currents having the necessary qualities to successfully change the magnetization direction of the free layer pattern are referred to as switching currents.
FIG. 1 is a circuit diagram illustrating cell arrays of a conventional STT-MRAM device. Each memory cell may include a selection transistor 102 and a magnetic tunnel junction (MTJ) structure 104. The memory cells may be connected to each other by word lines (e.g., W/L) and bit lines (e.g., B/L). For example, the word lines may be coupled to gates of the respective selection transistors 102. The bit lines may be coupled to the MTJ structures 104, which are coupled to the drains of the respective selection transistors 102.
Currents or voltages may be applied to the word lines and/or the bit lines. By controlling such currents or voltages, a resistance of the MTJ structure 104 may be changed, which represents different data stored by or otherwise written to the memory cell. For example, when the resistance of the MTJ structure 104 is switched to a high value, the memory cell may be understood to store a “1” value. Conversely, when the resistance of the MTJ structure 104 is switched to a relatively lower value, the memory cell may be understood to store a “0” value. It will be understood that this is one convention. In another convention, a high resistance may correspond to a “0” value and a relatively lower resistance may correspond to a “1” value.
Due to the distribution characteristics of memory cells in the STT-MRAM device, switching currents that are capable of successfully changing magnetization directions of free layer patterns are not necessarily the same from one memory cell to the next, or from one group of memory cells to another group of memory cells. For example, when a switching current is applied to particular memory cells, the data stored in the particular memory cells may be successfully switched only when the switching current is higher or lower than usual. In other words, different memory cells may need a different switching current for successfully changing a magnetization direction of a free layer pattern. Otherwise, when the qualities of the applied currents are insufficient or ineffective at changing a magnetization direction of the free layer pattern, operation failure may occur. In some failure cases, no new data may be written in the memory cells. Accordingly, a device and method is needed for applying a proper switching current having the qualities for successfully changing a magnetization direction of a free layer pattern associated with diverse STT-MRAM memory cells.